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10th ChinaSys Workshop Program

ChinaSys 2016 Program

June 17th - 18th, 2016

Holiday Inn Express Beijing Minzuyuan(北京民族园智选假日酒店), Beijing

Organized by ACM SIGOPS ChinaSys, Tsinghua University

Sponsored by 博普科技

Day 1: June 17th

8:50 - 9:00 Openning

9:00-10:30 Invited Talks, Chair: Wenguang Chen

Crypto-Currencies based on Consensus with Heterogeneous Trust, Robbert van Renesse(Cornell University)

Invited Talk, Deep Learning/AI and System Research: an Insider’s Perspective, Zheng Zhang(Shanghai New York University)

10:30 - 11:00 Coffee Break

11:00 - 12:00 Panel Discussion: What’s exciting in computer systems?

Panelist: Zheng Zhang, Haibo Chen, Yungang Bao, Lidong Zhou

12:00 - 13:00 Lunch

13:00 – 13:45 Invited Talk

The Fusion of Computing and Memory: Challenges of Computer Architecture for Big Data, Yuan Xie(UCSB)

13:45 - 15:15 Session 1: Data Center, Chair: Haibo Chen

Scale SDN with Reconfigurable Hardware. Kun Tan, MSRA

SDA: Software-Defined Accelerator for large-scale deep learning system, Wei Qi, BAIDU

QoStack—Data Center Management Framework with Qos and Utilization guarantee, Wenjie Li,ICT

15:15 – 15:45 Session 2: Mobile Systems : Li Shen

Plug-and-play Indoor Navigation Using Smartphones, Yuanchao Shu, MSRA

15:45 - 16:00 Tea Break

16:00 - 17:00 Session 3: Virtualization, Chair: Yungang Bao

CPU Elasticity to Mitigate Cross-VM Runtime Monitoring,Yuze Mi,SJTU

vTZ: Security-Oriented Virtualization of ARM TrustZone,Zhichao Hua,SJTU

17:00 - 18:30 Session 4: Code Analysis, Chair : Yu Zhang

KernelGraph: Understanding the Kernel in a Graph,Jianjun Shi,BIT

pbSE: phased-based Symbolic Execution,Qixue Xiao and Yu Chen,Tsinghua

Nested Dataflow Parallel Programming Model,Yuan Tang,Fudan University

18:30 Dinner

Day 2: June 18th

9:00 - 10:30 Session 5: Parallel Programming, Compiler and Runtime, Chair: Haikun Liu

Understanding Co-run Degradations on Integrated Heterogeneous Processors, Qi Zhu,NUDT

Compiler Optimization Techniques for GPUs, Yun Liang, PKU

EunomiaTree: A HTM-friendly Tree Structure for High Contention Workloads, Wang Xin, Fudan

10:30-11:00 Tea Break

11:00-12:00 Session 6: Machine Learning Architecture and Systems: Yinhe Han

Cambricon, An Instruction Set Architecture for Neural Networks, Zidong Du, ICT

WarpLDA: a Cache Efficient O(1) Algorithm for Latent Dirichlet Allocation , Jianfei Chen, Tsinghua

12:00 – 12:30 Announce the Next ChinaSys and Free Discussion

12:30 Lunch

program-10.txt · Last modified: 2020/08/10 14:53 by root

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